https://wiki.srns.ru/index.php?action=history&feed=atom&title=%D0%94%D0%BE%D0%B1%D0%B0%D0%B2%D0%BB%D0%B5%D0%BD%D0%B8%D0%B5_testbench%27%D0%B5%D0%B9_%D0%BD%D0%B0_%D1%8F%D0%B7%D1%8B%D0%BA%D0%B5_Verilog_%D0%B2_%D0%BF%D1%80%D0%BE%D0%B5%D0%BA%D1%82_Vivado 2026-04-06T23:14:35Z История изменений этой страницы в вики MediaWiki 1.20.3 https://wiki.srns.ru/index.php?title=%D0%94%D0%BE%D0%B1%D0%B0%D0%B2%D0%BB%D0%B5%D0%BD%D0%B8%D0%B5_testbench%27%D0%B5%D0%B9_%D0%BD%D0%B0_%D1%8F%D0%B7%D1%8B%D0%BA%D0%B5_Verilog_%D0%B2_%D0%BF%D1%80%D0%BE%D0%B5%D0%BA%D1%82_Vivado&diff=18863&oldid=prev 2016-11-09T11:54:08Z

<p>‎<span dir="auto"><span class="autocomment">Ссылки</span></span></p> <table class='diff diff-contentalign-left'> <col class='diff-marker' /> <col class='diff-content' /> <col class='diff-marker' /> <col class='diff-content' /> <tr style='vertical-align: top;'> <td colspan='2' style="background-color: white; color:black;">← Предыдущая</td> <td colspan='2' style="background-color: white; color:black;">Версия 11:54, 9 ноября 2016</td> </tr><tr><td colspan="2" class="diff-lineno">Строка 867:</td> <td colspan="2" class="diff-lineno">Строка 867:</td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[https://inst.eecs.berkeley.edu/~cs150/fa06/Labs/verilog-ieee.pdf Verilog-2001]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[https://inst.eecs.berkeley.edu/~cs150/fa06/Labs/verilog-ieee.pdf Verilog-2001]</div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.uccs.edu/~gtumbush/published_papers/Tumbush%20DVCon%2005.pdf Signed Arithmetic in Verilog 2001 – Opportunities and Hazards]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.uccs.edu/~gtumbush/published_papers/Tumbush%20DVCon%2005.pdf Signed Arithmetic in Verilog 2001 – Opportunities and Hazards]</div></td></tr> <tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div><del style="color: red; font-weight: bold; text-decoration: none;"></del></div></td><td colspan="2">&#160;</td></tr> <tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div><del style="color: red; font-weight: bold; text-decoration: none;">&lt;!-- комментарий </del></div></td><td colspan="2">&#160;</td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:HOWTO]]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:HOWTO]]</div></td></tr> <tr><td colspan="2" class="diff-lineno">Строка 876:</td> <td colspan="2" class="diff-lineno">Строка 874:</td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Category:FPGA]]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Category:FPGA]]</div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Category:Verilog]]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Category:Verilog]]</div></td></tr> <tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div><del style="color: red; font-weight: bold; text-decoration: none;"></del></div></td><td colspan="2">&#160;</td></tr> <tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div><del style="color: red; font-weight: bold; text-decoration: none;">--&gt;</del></div></td><td colspan="2">&#160;</td></tr> </table>

Dneprov D https://wiki.srns.ru/index.php?title=%D0%94%D0%BE%D0%B1%D0%B0%D0%B2%D0%BB%D0%B5%D0%BD%D0%B8%D0%B5_testbench%27%D0%B5%D0%B9_%D0%BD%D0%B0_%D1%8F%D0%B7%D1%8B%D0%BA%D0%B5_Verilog_%D0%B2_%D0%BF%D1%80%D0%BE%D0%B5%D0%BA%D1%82_Vivado&diff=18862&oldid=prev 2016-11-09T11:53:12Z

<p>‎<span dir="auto"><span class="autocomment">Ссылки</span></span></p> <table class='diff diff-contentalign-left'> <col class='diff-marker' /> <col class='diff-content' /> <col class='diff-marker' /> <col class='diff-content' /> <tr style='vertical-align: top;'> <td colspan='2' style="background-color: white; color:black;">← Предыдущая</td> <td colspan='2' style="background-color: white; color:black;">Версия 11:53, 9 ноября 2016</td> </tr><tr><td colspan="2" class="diff-lineno">Строка 868:</td> <td colspan="2" class="diff-lineno">Строка 868:</td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.uccs.edu/~gtumbush/published_papers/Tumbush%20DVCon%2005.pdf Signed Arithmetic in Verilog 2001 – Opportunities and Hazards]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.uccs.edu/~gtumbush/published_papers/Tumbush%20DVCon%2005.pdf Signed Arithmetic in Verilog 2001 – Opportunities and Hazards]</div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>&lt;!-- комментарий <del class="diffchange diffchange-inline">--&gt;</del></div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>&lt;!-- комментарий &#160;</div></td></tr> <tr><td colspan="2">&#160;</td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>&#160;</div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:HOWTO]]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:HOWTO]]</div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:Git]]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:Git]]</div></td></tr> <tr><td colspan="2" class="diff-lineno">Строка 875:</td> <td colspan="2" class="diff-lineno">Строка 876:</td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Category:FPGA]]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Category:FPGA]]</div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Category:Verilog]]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Category:Verilog]]</div></td></tr> <tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div><del class="diffchange diffchange-inline">&lt;!---------------</del>--&gt;</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>&#160;</div></td></tr> <tr><td colspan="2">&#160;</td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>--&gt;</div></td></tr> </table>

Dneprov D https://wiki.srns.ru/index.php?title=%D0%94%D0%BE%D0%B1%D0%B0%D0%B2%D0%BB%D0%B5%D0%BD%D0%B8%D0%B5_testbench%27%D0%B5%D0%B9_%D0%BD%D0%B0_%D1%8F%D0%B7%D1%8B%D0%BA%D0%B5_Verilog_%D0%B2_%D0%BF%D1%80%D0%BE%D0%B5%D0%BA%D1%82_Vivado&diff=18861&oldid=prev 2016-11-09T11:52:09Z

<p>‎<span dir="auto"><span class="autocomment">Ссылки</span></span></p> <table class='diff diff-contentalign-left'> <col class='diff-marker' /> <col class='diff-content' /> <col class='diff-marker' /> <col class='diff-content' /> <tr style='vertical-align: top;'> <td colspan='2' style="background-color: white; color:black;">← Предыдущая</td> <td colspan='2' style="background-color: white; color:black;">Версия 11:52, 9 ноября 2016</td> </tr><tr><td colspan="2" class="diff-lineno">Строка 868:</td> <td colspan="2" class="diff-lineno">Строка 868:</td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.uccs.edu/~gtumbush/published_papers/Tumbush%20DVCon%2005.pdf Signed Arithmetic in Verilog 2001 – Opportunities and Hazards]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.uccs.edu/~gtumbush/published_papers/Tumbush%20DVCon%2005.pdf Signed Arithmetic in Verilog 2001 – Opportunities and Hazards]</div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td colspan="2">&#160;</td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins style="color: red; font-weight: bold; text-decoration: none;">&lt;!-- комментарий --&gt;</ins></div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:HOWTO]]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:HOWTO]]</div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:Git]]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:Git]]</div></td></tr> <tr><td colspan="2" class="diff-lineno">Строка 874:</td> <td colspan="2" class="diff-lineno">Строка 875:</td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Category:FPGA]]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Category:FPGA]]</div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Category:Verilog]]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Category:Verilog]]</div></td></tr> <tr><td colspan="2">&#160;</td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins style="color: red; font-weight: bold; text-decoration: none;">&lt;!-----------------&gt;</ins></div></td></tr> </table>

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<p>‎<span dir="auto"><span class="autocomment">Ссылки</span></span></p> <table class='diff diff-contentalign-left'> <col class='diff-marker' /> <col class='diff-content' /> <col class='diff-marker' /> <col class='diff-content' /> <tr style='vertical-align: top;'> <td colspan='2' style="background-color: white; color:black;">← Предыдущая</td> <td colspan='2' style="background-color: white; color:black;">Версия 10:56, 9 ноября 2016</td> </tr><tr><td colspan="2" class="diff-lineno">Строка 872:</td> <td colspan="2" class="diff-lineno">Строка 872:</td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:Xilinx]]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:Xilinx]]</div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:Vivado]]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:Vivado]]</div></td></tr> <tr><td colspan="2">&#160;</td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins style="color: red; font-weight: bold; text-decoration: none;">[[Category:FPGA]]</ins></div></td></tr> <tr><td colspan="2">&#160;</td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins style="color: red; font-weight: bold; text-decoration: none;">[[Category:Verilog]]</ins></div></td></tr> </table>

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<p>Откат правок <a href="/wiki/%D0%A1%D0%BB%D1%83%D0%B6%D0%B5%D0%B1%D0%BD%D0%B0%D1%8F:%D0%92%D0%BA%D0%BB%D0%B0%D0%B4/Dneprov_D" title="Служебная:Вклад/Dneprov D">Dneprov D</a> (<a href="/index.php?title=%D0%9E%D0%B1%D1%81%D1%83%D0%B6%D0%B4%D0%B5%D0%BD%D0%B8%D0%B5_%D1%83%D1%87%D0%B0%D1%81%D1%82%D0%BD%D0%B8%D0%BA%D0%B0:Dneprov_D&amp;action=edit&amp;redlink=1" class="new" title="Обсуждение участника:Dneprov D (страница не существует)">обсуждение</a>) к версии <a href="/wiki/%D0%A3%D1%87%D0%B0%D1%81%D1%82%D0%BD%D0%B8%D0%BA:Korogodin" class="mw-redirect" title="Участник:Korogodin">Korogodin</a></p> <table class='diff diff-contentalign-left'> <col class='diff-marker' /> <col class='diff-content' /> <col class='diff-marker' /> <col class='diff-content' /> <tr style='vertical-align: top;'> <td colspan='2' style="background-color: white; color:black;">← Предыдущая</td> <td colspan='2' style="background-color: white; color:black;">Версия 10:55, 9 ноября 2016</td> </tr><tr><td colspan="2" class="diff-lineno">Строка 872:</td> <td colspan="2" class="diff-lineno">Строка 872:</td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:Xilinx]]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:Xilinx]]</div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:Vivado]]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:Vivado]]</div></td></tr> <tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div><del style="color: red; font-weight: bold; text-decoration: none;">[[Category:FPGA]]</del></div></td><td colspan="2">&#160;</td></tr> <tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div><del style="color: red; font-weight: bold; text-decoration: none;">[[Category:Verilog]]</del></div></td><td colspan="2">&#160;</td></tr> </table>

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Dneprov D https://wiki.srns.ru/index.php?title=%D0%94%D0%BE%D0%B1%D0%B0%D0%B2%D0%BB%D0%B5%D0%BD%D0%B8%D0%B5_testbench%27%D0%B5%D0%B9_%D0%BD%D0%B0_%D1%8F%D0%B7%D1%8B%D0%BA%D0%B5_Verilog_%D0%B2_%D0%BF%D1%80%D0%BE%D0%B5%D0%BA%D1%82_Vivado&diff=18106&oldid=prev 2016-04-19T12:32:20Z

<p>‎<span dir="auto"><span class="autocomment">Ссылки</span></span></p> <table class='diff diff-contentalign-left'> <col class='diff-marker' /> <col class='diff-content' /> <col class='diff-marker' /> <col class='diff-content' /> <tr style='vertical-align: top;'> <td colspan='2' style="background-color: white; color:black;">← Предыдущая</td> <td colspan='2' style="background-color: white; color:black;">Версия 12:32, 19 апреля 2016</td> </tr><tr><td colspan="2" class="diff-lineno">Строка 866:</td> <td colspan="2" class="diff-lineno">Строка 866:</td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://compitech.ru/html.cgi/arhiv/01_05/stat_66.htm Verilog — инструмент разработки цифровых электронных схем: О синтезируемых конструкциях]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://compitech.ru/html.cgi/arhiv/01_05/stat_66.htm Verilog — инструмент разработки цифровых электронных схем: О синтезируемых конструкциях]</div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[https://inst.eecs.berkeley.edu/~cs150/fa06/Labs/verilog-ieee.pdf Verilog-2001]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[https://inst.eecs.berkeley.edu/~cs150/fa06/Labs/verilog-ieee.pdf Verilog-2001]</div></td></tr> <tr><td colspan="2">&#160;</td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins style="color: red; font-weight: bold; text-decoration: none;">*[http://www.uccs.edu/~gtumbush/published_papers/Tumbush%20DVCon%2005.pdf Signed Arithmetic in Verilog 2001 – Opportunities and Hazards]</ins></div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:HOWTO]]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:HOWTO]]</div></td></tr> </table>

Korogodin https://wiki.srns.ru/index.php?title=%D0%94%D0%BE%D0%B1%D0%B0%D0%B2%D0%BB%D0%B5%D0%BD%D0%B8%D0%B5_testbench%27%D0%B5%D0%B9_%D0%BD%D0%B0_%D1%8F%D0%B7%D1%8B%D0%BA%D0%B5_Verilog_%D0%B2_%D0%BF%D1%80%D0%BE%D0%B5%D0%BA%D1%82_Vivado&diff=18012&oldid=prev 2016-04-12T08:09:40Z

<p></p> <table class='diff diff-contentalign-left'> <col class='diff-marker' /> <col class='diff-content' /> <col class='diff-marker' /> <col class='diff-content' /> <tr style='vertical-align: top;'> <td colspan='2' style="background-color: white; color:black;">← Предыдущая</td> <td colspan='2' style="background-color: white; color:black;">Версия 08:09, 12 апреля 2016</td> </tr><tr><td colspan="2" class="diff-lineno">Строка 865:</td> <td colspan="2" class="diff-lineno">Строка 865:</td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.compitech.ru/html.cgi/arhiv/01_04/stat_76.htm Verilog — инструмент разработки цифровых электронных схем: О моделируемых конструкциях]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.compitech.ru/html.cgi/arhiv/01_04/stat_76.htm Verilog — инструмент разработки цифровых электронных схем: О моделируемых конструкциях]</div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://compitech.ru/html.cgi/arhiv/01_05/stat_66.htm Verilog — инструмент разработки цифровых электронных схем: О синтезируемых конструкциях]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://compitech.ru/html.cgi/arhiv/01_05/stat_66.htm Verilog — инструмент разработки цифровых электронных схем: О синтезируемых конструкциях]</div></td></tr> <tr><td colspan="2">&#160;</td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins style="color: red; font-weight: bold; text-decoration: none;">*[https://inst.eecs.berkeley.edu/~cs150/fa06/Labs/verilog-ieee.pdf Verilog-2001]</ins></div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:HOWTO]]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:HOWTO]]</div></td></tr> </table>

Boldenkov https://wiki.srns.ru/index.php?title=%D0%94%D0%BE%D0%B1%D0%B0%D0%B2%D0%BB%D0%B5%D0%BD%D0%B8%D0%B5_testbench%27%D0%B5%D0%B9_%D0%BD%D0%B0_%D1%8F%D0%B7%D1%8B%D0%BA%D0%B5_Verilog_%D0%B2_%D0%BF%D1%80%D0%BE%D0%B5%D0%BA%D1%82_Vivado&diff=18011&oldid=prev 2016-04-11T21:32:25Z

<p>‎<span dir="auto"><span class="autocomment">Ссылки</span></span></p> <table class='diff diff-contentalign-left'> <col class='diff-marker' /> <col class='diff-content' /> <col class='diff-marker' /> <col class='diff-content' /> <tr style='vertical-align: top;'> <td colspan='2' style="background-color: white; color:black;">← Предыдущая</td> <td colspan='2' style="background-color: white; color:black;">Версия 21:32, 11 апреля 2016</td> </tr><tr><td colspan="2" class="diff-lineno">Строка 862:</td> <td colspan="2" class="diff-lineno">Строка 862:</td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.xilinx.com/support/answers/64000.html AR64000: Understanding Waveform Database file (WDB) and Wave Configuration File (WCFG)]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.xilinx.com/support/answers/64000.html AR64000: Understanding Waveform Database file (WDB) and Wave Configuration File (WCFG)]</div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.compitech.ru/html.cgi/arhiv/01_02/stat_86.htm Verilog — инструмент разработки цифровых электронных схем: О типах данных]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.compitech.ru/html.cgi/arhiv/01_02/stat_86.htm Verilog — инструмент разработки цифровых электронных схем: О типах данных]</div></td></tr> <tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*[http://www.compitech.ru/html.cgi/arhiv/01_03/stat_134.htm — инструмент разработки цифровых электронных схем: Операторы]</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>*[http://www.compitech.ru/html.cgi/arhiv/01_03/stat_134.htm <ins class="diffchange diffchange-inline">Verilog </ins>— инструмент разработки цифровых электронных схем: Операторы]</div></td></tr> <tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*[http://www.<del class="diffchange diffchange-inline">platan</del>.ru/<del class="diffchange diffchange-inline">shem</del>/<del class="diffchange diffchange-inline">pdf</del>/<del class="diffchange diffchange-inline">verilog2</del>.<del class="diffchange diffchange-inline">pdf </del>Verilog — инструмент разработки цифровых электронных схем: О моделируемых конструкциях]</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>*[http://www.<ins class="diffchange diffchange-inline">compitech</ins>.ru/<ins class="diffchange diffchange-inline">html.cgi/arhiv</ins>/<ins class="diffchange diffchange-inline">01_04</ins>/<ins class="diffchange diffchange-inline">stat_76</ins>.<ins class="diffchange diffchange-inline">htm </ins>Verilog — инструмент разработки цифровых электронных схем: О моделируемых конструкциях]</div></td></tr> <tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*[http://<del class="diffchange diffchange-inline">www.platan</del>.ru/<del class="diffchange diffchange-inline">shem</del>/<del class="diffchange diffchange-inline">pdf</del>/<del class="diffchange diffchange-inline">verilog3</del>.<del class="diffchange diffchange-inline">pdf </del>Verilog — инструмент разработки цифровых электронных схем: О синтезируемых конструкциях]</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>*[http://<ins class="diffchange diffchange-inline">compitech</ins>.ru/<ins class="diffchange diffchange-inline">html.cgi/arhiv</ins>/<ins class="diffchange diffchange-inline">01_05</ins>/<ins class="diffchange diffchange-inline">stat_66</ins>.<ins class="diffchange diffchange-inline">htm </ins>Verilog — инструмент разработки цифровых электронных схем: О синтезируемых конструкциях]</div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:HOWTO]]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>[[Категория:HOWTO]]</div></td></tr> </table>

Korogodin https://wiki.srns.ru/index.php?title=%D0%94%D0%BE%D0%B1%D0%B0%D0%B2%D0%BB%D0%B5%D0%BD%D0%B8%D0%B5_testbench%27%D0%B5%D0%B9_%D0%BD%D0%B0_%D1%8F%D0%B7%D1%8B%D0%BA%D0%B5_Verilog_%D0%B2_%D0%BF%D1%80%D0%BE%D0%B5%D0%BA%D1%82_Vivado&diff=18010&oldid=prev 2016-04-11T21:30:39Z

<p>‎<span dir="auto"><span class="autocomment">Ссылки</span></span></p> <table class='diff diff-contentalign-left'> <col class='diff-marker' /> <col class='diff-content' /> <col class='diff-marker' /> <col class='diff-content' /> <tr style='vertical-align: top;'> <td colspan='2' style="background-color: white; color:black;">← Предыдущая</td> <td colspan='2' style="background-color: white; color:black;">Версия 21:30, 11 апреля 2016</td> </tr><tr><td colspan="2" class="diff-lineno">Строка 861:</td> <td colspan="2" class="diff-lineno">Строка 861:</td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.xilinx.com/support/documentation/sw_manuals/xilinx2014_2/ug900-vivado-logic-simulation.pdf Xilinx UG900: Logic Simulation]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.xilinx.com/support/documentation/sw_manuals/xilinx2014_2/ug900-vivado-logic-simulation.pdf Xilinx UG900: Logic Simulation]</div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.xilinx.com/support/answers/64000.html AR64000: Understanding Waveform Database file (WDB) and Wave Configuration File (WCFG)]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.xilinx.com/support/answers/64000.html AR64000: Understanding Waveform Database file (WDB) and Wave Configuration File (WCFG)]</div></td></tr> <tr><td class='diff-marker'>−</td><td style="background: #ffa; color:black; font-size: smaller;"><div>*[http://www.compitech.ru/html.cgi/arhiv/01_02/stat_86.htm Verilog — инструмент разработки цифровых электронных схем: <del class="diffchange diffchange-inline">Начало</del>]</div></td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div>*[http://www.compitech.ru/html.cgi/arhiv/01_02/stat_86.htm Verilog — инструмент разработки цифровых электронных схем: <ins class="diffchange diffchange-inline">О типах данных]</ins></div></td></tr> <tr><td colspan="2">&#160;</td><td class='diff-marker'>+</td><td style="background: #cfc; color:black; font-size: smaller;"><div><ins class="diffchange diffchange-inline">*[http://www.compitech.ru/html.cgi/arhiv/01_03/stat_134.htm — инструмент разработки цифровых электронных схем: Операторы</ins>]</div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.platan.ru/shem/pdf/verilog2.pdf Verilog — инструмент разработки цифровых электронных схем: О моделируемых конструкциях]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.platan.ru/shem/pdf/verilog2.pdf Verilog — инструмент разработки цифровых электронных схем: О моделируемых конструкциях]</div></td></tr> <tr><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.platan.ru/shem/pdf/verilog3.pdf Verilog — инструмент разработки цифровых электронных схем: О синтезируемых конструкциях]</div></td><td class='diff-marker'>&#160;</td><td style="background: #eee; color:black; font-size: smaller;"><div>*[http://www.platan.ru/shem/pdf/verilog3.pdf Verilog — инструмент разработки цифровых электронных схем: О синтезируемых конструкциях]</div></td></tr> </table>

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